ARM7 LPC2478 Header Board : Lauched by CoiNel Technology Solutions LLP

March 9, 2012 - PRLog -- Overview


The LPC2478 Header Board is based on ARM7TDMI-S Core, running at up to 72MHz, with 512KB internal Flash memory and 98KB SRAM.


The Board features an LPC2478 controller, JTAG, an USB Device, onboard power supply and all the input output pins taken out via a 2.54mm standard Berg Connectivity. The Board can be used as a general controller board for various designs and different connectivity options can be tried out as required using breakout boards.


The sample source code, schematic, software and tools are provided along with the board using which you can start with your application development from day 1.

For more information on these board, kindly go through the following link

http://coineltech.com/index.php?main_page=product_info&cPath=7&products_id=7

The LPC2478 Header Board has a 20 pin Wiggler-compatible JTAG interface which can be used for debugging/programming.


The board can be debugged/programmed using parallel JTAG. You can also program the board via UART0 by the use of a simple TTL to RS232 converter. Parallel JTAG and TTL to RS232 converters are not the part of the package.


Demo on this board as follows

1. LPC2478 Header Board Description
http://www.youtube.com/watch?v=mNCDFQnYYT4&feature=player...



LPC2478 Header Board Specifications


   1. MCU: LPC2478

   2. Processor: ARM7TDMI S Core

   3. Standard JTAG connector (2x10 pin) for programming/debugging with ARM-JTAG.

   4. The board has access to allmost all pins  for external connection.
       i. This makes it easy for any external device interface.
       ii.The pins are named according to the interfaces where ever possible.
       iii.All pins are available via standard 2.54mm Berg Strip.


   5. On Board USB Device with USB Link LED. This is a perfect solution for developing USB Peripherals.

  6.  On Board 3.3V and 5V Power Supply with Power Supply LED and filtering capacitor.

   7. On Board Reset and ISP Circuit.

   8. 12 MHz crystal oscillator.

   9. 32.768 kHz crystal for Real Time Clock.

   10. PCB: FR-4, 1.6 mm, Green or Red soldermask, white silkscreen component print.

   11. Board Dimensions: 106 x 65 mm

KIT DELIVERABLES

   1. LPC2478 Header Board

   2. USB Cable

   3. CD Containing source code, schematic, tools and documentation.

LPC2478 MCU Specifications

The LPC2478 series is built on a 2-AHB bus architecture. The LPC2478 features Ethernet, USB FS, and CAN. The LPC2478 further adds a USB Host/OTG, an external bus, and higher I/O count, making this the most powerful series of ARM7-based MCUs in the marketplace. LPC2478 microcontrollers further integrate an LCD controller supporting high resolution  STN (Super-Twisted Nematic) and TFT (Thin-Film Transistor) panels with up to 24-bit true color.


The following are the specifications of the controller

   1. ARM7TDMI-S processor, running at up to 72 MHz.
   2. 512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high performance CPU access.
   3. 98 kB on-chip SRAM includes:
       64 kB of SRAM on the ARM local bus for high performance CPU access.
       16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
       16 kB SRAM for general purpose DMA use also accessible by the USB.
       2 kB SRAM data storage powered from the Real-Time Clock (RTC) power domain.
   4. LCD controller, supporting both Super-Twisted Nematic (STN) and Thin-Film Transistors (TFT) displays.
       Dedicated DMA controller.
       Selectable display resolution (up to 1024 × 768 pixels).
       Supports up to 24-bit true-color mode.
   5. Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention.
   6. EMC provides support for asynchronous static memory devices such as RAM, ROM and flash, as well as dynamic memories such as single data rate SDRAM.
   7. Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
   8. General Purpose DMA (GPDMA) controller on AHB that can be used with the SSP, I²S-bus, and SD/MMC interface as well as for memory-to-memory transfers.
   9. Serial Interfaces:
       Ethernet MAC with MII/RMII interface and associated DMA controller. These functions reside on an independent AHB.
       USB 2.0 full-speed dual port device/host/OTG controller with on-chip PHY and associated DMA controller.
       Four UARTs with fractional baud rate generation, one with modem control I/O, one with IrDA support, all with FIFO.
       CAN controller with two channels.
       SPI controller.
       Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate for the SPI port, sharing its interrupt. SSPs can be used with the GPDMA controller.
       Three I²C-bus interfaces (one with open-drain and two with standard port pins).
       I²S (Inter-IC Sound) interface for digital audio input or output. It can be used with the GPDMA.
   Other peripherals:
       SD/MMC memory card interface.
       160 General purpose I/O pins with configurable pull-up/down resistors.
       10-bit ADC with input multiplexing among 8 pins.
       10-bit DAC.
       Four general purpose timers/counters with 8 capture inputs and 10 compare outputs. Each timer block has an external count input.
       Two PWM/timer blocks with support for three-phase motor control. Each PWM has an external count input.
       RTC with separate power domain. Clock source can be the RTC oscillator or the APB clock.
       2 kB SRAM powered from the RTC power pin, allowing data to be stored when the rest of the chip is powered off.
       WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator, the RTC oscillator, or the APB clock.
   Single 3.3 V power supply (3.0 V to 3.6 V).
   4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as the system clock.
   Four reduced power modes: idle, sleep, power-down and deep power-down.
   Four external interrupt inputs configurable as edge/level sensitive. All pins on port 0 and port 2 can be used as edge sensitive interrupt sources.
   Processor wake-up from Power-down mode via any interrupt able to operate during Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet wake-up interrupt, CAN bus activity, port 0/2 pin interrupt).
   Two independent power domains allow fine tuning of power consumption based on needed features.
   Each peripheral has its own clock divider for further power saving. These dividers help reduce active power by 20 % to 30 %.
   Brownout detect with separate thresholds for interrupt and forced reset.
   On-chip power-on reset.
   On-chip crystal oscillator with an operating range of 1 MHz to 25 MHz.
   On-chip PLL allows CPU operation up to the maximum CPU rate without the need for a high frequency crystal. May be run from the main oscillator, the internal RC oscillator, or the RTC oscillator.
   Boundary scan for simplified board testing.
   Versatile pin function selections allow more possibilities for using on-chip peripheral functions.
   Standard ARM test/debug interface for compatibility with existing tools.